Job Summary:
The Mid-Level Digital Implementation Engineer supports digital design implementation, including synthesis, floorplanning, and timing closure. This role involves collaborating with senior engineers to optimize designs and develop automation scripts for efficiency.

Key Responsibilities:

• Digital Design Implementation: Execute synthesis, PnR, and optimization of digital designs, ensuring efficient power, performance, and area trade-offs.
• Timing Closure: Perform static timing analysis and assist in timing closure across multiple process corners.
• Collaboration: Work closely with senior engineers and cross-functional teams to ensure successful implementation.
• Methodology Development: Support the development and enhancement of digital implementation methodologies.
• Tool Utilization: Utilize EDA tools efficiently for synthesis, PnR, STA, and optimization tasks.
• Debugging and Troubleshooting: Assist in debugging and resolving issues related to DRC, LVS, timing violations, and physical constraints.
• Documentation: Maintain records of design processes and methodologies for knowledge sharing.
• Mentorship: Provide guidance to junior engineers and interns in digital design workflows.

Key Qualifications

• Bachelor’s degree in Electrical Engineering, Computer Engineering, or a related field. Master’s/PhD is a plus.
• 4+ years of experience in digital implementation.
• Experience with synthesis, PnR, STA, and timing closure.
• Familiarity with EDA tools like Cadence Innovus, Synopsys ICC2, and Prime Time.
• Strong scripting skills in TCL, Perl, or Python.