Job Summary:
The Senior Analog Verification Engineer is responsible for leading the analog verification efforts, ensuring the design of analog and mixed-signal circuits meets specification and performance criteria. This role requires both hands-on verification work and leadership of verification projects, collaborating with cross-functional teams to optimize design processes and ensure the highest quality standards.

Key Responsibilities:

• Lead the analog verification efforts for complex analog and mixed-signal designs from block-level to full-chip.
• Develop and implement analog verification strategies, including the creation of test benches, validation environments, and verification plans based on design specifications.
• Perform simulations to ensure the correctness, robustness, and performance of analog circuits and systems.
• Develop custom verification tools and automation scripts to improve efficiency and coverage.
• Analyze simulation results, debug issues, and work with design teams to resolve discrepancies and improve design quality.
• Collaborate with design, CAD, and other verification teams to align verification activities with design goals.
• Develop and manage verification methodologies and best practices for analog verification processes.
• Mentor and guide junior verification engineers, providing technical leadership and support.
• Review and validate simulation results, ensuring verification is thorough and complete.
• Work closely with the design team to provide feedback on potential design optimizations and improvements.
• Lead verification-related documentation, including test reports, coverage analysis, and verification sign-off.

Key Qualifications

• Bachelor’s in Electrical Engineering, Electronics Engineering, or a related field.. Master’s/PhD is a plus.
• At least 5-7 years of experience in analog or mixed-signal verification, preferably in a senior role.
• Expertise in analog verification methodologies, including simulation and coverage analysis.
• Strong background in analog and mixed-signal simulation using tools such as Spectre, HSPICE, or other industry-standard tools.
• Experience with creating custom analog verification testbenches and methodologies.
• Familiarity with tools for waveform analysis and debugging, such as MATLAB, Verilog-A, or similar.
• Experience with hierarchical analog verification, including top-down verification for complex systems.
• Proficiency in scripting languages such as Python, Perl, or TCL to automate verification tasks and improve efficiency.
• Ability to write custom verification scripts and tools to augment existing simulation flows.